About Us

LogicTronix is an FPGA Design Company, We are working on FPGA and Electronic Hardware Design industry since 4+ years. We are team of FPGA Engineer’s and Tech Manager. Our mission , vision statements and objectives:

“Providing best and quality design services on FPGA and Electronic Hardware Design”

“Creating own place on global FPGA Design Industry”
  • Delivering the turnkey solutions on FPGA and embedded design
  • Enhancing the Research and Development for FPGA Design with inhouse resource and collaboration.
Our Area of Expertise
  • Computer Vision Application Development with Xilinx Zynq Family FPGA and  VHDL/Verilog, High Level Synthesis ( C/C++ OpenCV),Embedded C (for SDK programming for software application) along with Tcl and  Bash.
  • FPGA Development with Intel Altera tools [Quartus Prime] and FPGA’s.
  • Development, Implementation and Migration of Projects to ZC702 and MPSoC FPGA from Xilinx.
  • Machine Learning Acceleration with Xilinx VCU1525 and Alveo FPGA with AWS , Nimbix or Standalone mode.
  • Acceleration of OpenCL applications on SDAccel tool for VCU1525 and Alveo
  • We can develop any embedded system with SDSoC tools targeting the SoC (Zynq 7000 & Ultrascale+MPSoC) FPGA. SDSoC Tool reduce the overall design time than of VIVADO Tool (using VIVADO HLS, IP integrator and SDK), it also allow us to design and create a bootable system files just from few clicks. While designing with VIVADO, SDK and Petalinux need extensive skillset for creating a embedded projects.
  • Crypto-mining application development: Implementing CryptonightV7, Skunk, X17 and X16r/s algorithms targeting VCU1525/BCU1525, Alveo and CVP-13.
Other Development’s at LogicTronix:
  • As of our “Democratizing FPGA Education All Over the World” initiative, we are also providing Online Courses on “FPGA/VHDL/Verilog and HLS/OpenCL” at Udemy. We launch “Video Processing with FPGA” Course at Udemy Platform in collaboration with Digitronix Nepal, this course includes session on Processing Video with algorithms as Sobel Edge, Harrish Corner, Fast Corner, Histogram Equalize and Test Pattern Generator + VDMA integration on FPGA Design. This video processing course can be reviewed or accessed from this link: Link
  • Along with this we also have released “Zynq Ultrascale+MPSoC FPGA Development” Online Course at Link.
  • And, another State of Art tool from Xilinx is SDSoC (Software Defined System on Chip), An SoC FPGA Development environment. We also have Online Course on SDSoC at Link.
  • Image/Video Processing with Pynq FPGA (Python+Zynq) FPGA, PYNQ enable fast prototyping of Computer Vision Algorithm in FPGA’s. PYNQ can be customize both its hardware and software for applications as diverse as: Computer vision, Industrial control, IoT, Drones, Encryption, Embedded computing acceleration, Real-time processing and many more.Here is datasheet of board. For more info on PYNQ: PYNQ project webpage
Our Collaboration:
We are collaborating different companies on FPGA and Electronic Hardware Design, Machine Learning and Robotics. We are collaborating the FPGA Device Manufacturer, IP designing companies and Product development companies for providing holistic solution to our clients on Automotive, Industrial, Surveillance and Manufacturing Sectors.
For different research and development projects on FPGA and Electronic Hardware Design we are collaborating with Digitronix Nepal Pvt. Ltd [An Electronic Hardware Design Company established at 2015].
Know More about us

Our Portfolio: LogicTronix [dot] com_Portfolio

Machine Learning Portfolio: LogicTronix[dot]com_ML_Portfolio

White Paper and Reference Guide from LogicTronix on FPGA Design

Following are the white paper and reference guide on FPGA Design which we have prepared. If you are interested on this resources then do send us email at: info@logictronix.com,

  1. Crypto Algorithm Implementation on FPGA: We have worked on Cryptonight V7, Skunk hash, X17 algorithm for our clients.
  2. Verilog/VHDL and Tcl Reference Guide
  3. VIVADO Design suit Reference Guide
  4. Answer Record on Debugging at Device Startup (VIVADO ILA Trigger at Startup)
  5. Reference Guide: FPGA Design with OpenCL
  6. Reference Manual: Very High Speed Packet Processing System and Architecture: FPGA and Heterogeneous Computing Methodology
  7. Tcl Scripting for VIVADO Design’s for automation and Design/Verification: Reference Guide