LogicTronix have build and tested the DPU TRD for the Ultra96 FPGA development Board. The main tutorial we followed for this tutorials is DPU Integration Tutorial -Xilinx Github. All the steps are mentioned on the above DPU integration tutorial.
In this tutorial we have build the :
- Hardware Platform at VIVADO 2018.2 in Ubuntu 2016.04 LTS
- Generate the Linux Platform with Petalinux 2018.2
- Build the SDK application of “Resnet50” and “Face Detection” with VIVADO SDK 2018.2
The Vivado Block Design looks like:
You can see complete block design in PDF format: VIVADO Block Design-Complete DPU TRD
All the necessary details for building this project are listed on the DPU integration tutorial-Xilinx Github.
2. Output [snippet] of our build
Here is the snippet of the output captured on the serial terminal with Ultra96 FPGA on implementing the Resnet50 for the Image Classification, the image set used on this classification is DPU Integration Tutorial Xilinx Github- image500_640_480:
Fri May 3 15:53:20 UTC 2019 Load image : 2ILSVRC2012_test_00000035.JPEG Run ResNet50 CONV layers ... DPU CONV Execution time: 37352us DPU CONV Performance: 206.415GOPS Run ResNet50 FC layers ... DPU FC Execution time: 756us DPU FC Performance: 5.29101GOPS top prob = 0.549155 name = gasmask, respirator, gas helmet top prob = 0.095429 name = spotlight, spot top prob = 0.057880 name = traffic light, traffic signal, stoplight top prob = 0.045077 name = loudspeaker, speaker, speaker unit, loudspeaker system, speaker system top prob = 0.027341 name = reflex camera Load image : 2ILSVRC2012_test_00000140.JPEG Run ResNet50 CONV layers ... DPU CONV Execution time: 37362us DPU CONV Performance: 206.359GOPS Run ResNet50 FC layers ... DPU FC Execution time: 754us DPU FC Performance: 5.30504GOPS top prob = 0.329764 name = sidewinder, horned rattlesnake, Crotalus cerastes top prob = 0.256820 name = night snake, Hypsiglena torquata top prob = 0.200012 name = horned viper, cerastes, sand viper, horned asp, Cerastes cornutus top prob = 0.094479 name = rock python, rock snake, Python sebae top prob = 0.044629 name = king snake, kingsnake Load image : 2ILSVRC2012_test_00000204.JPEG Run ResNet50 CONV layers ... DPU CONV Execution time: 37350us DPU CONV Performance: 206.426GOPS Run ResNet50 FC layers ... DPU FC Execution time: 759us DPU FC Performance: 5.27009GOPS top prob = 0.998134 name = red wolf, maned wolf, Canis rufus, Canis niger top prob = 0.000709 name = dhole, Cuon alpinus top prob = 0.000552 name = malinois top prob = 0.000203 name = red fox, Vulpes vulpes top prob = 0.000075 name = llama . . . . Load image : ILSVRC2012_test_00099867.JPEG Run ResNet50 CONV layers ... DPU CONV Execution time: 37387us DPU CONV Performance: 206.221GOPS Run ResNet50 FC layers ... DPU FC Execution time: 756us DPU FC Performance: 5.29101GOPS top prob = 0.959654 name = weasel top prob = 0.022569 name = black-footed ferret, ferret, Mustela nigripes top prob = 0.013689 name = polecat, fitch, foulmart, foumart, Mustela putorius top prob = 0.001853 name = mink top prob = 0.000531 name = otter Fri May 3 15:54:13 UTC 2019
If you need the complete classified output of Resnet50, you can write us at: email@example.com. The Overall time taken for getting complete classified result using the Resnet50 is 53 Seconds.
We use this bash command to write the time and show the result of Resnet50 Application:
$ date> output.txt ; ./resnet50.elf >>output.txt ; date>> output.txt
We also have build the “Face Detection” application for Ultra96 based on the “DPU integration tutorial”.
If you are interested to implement this demo test design on your Ultra96 then, see “section 3” or see below . The Bootable files of our’s looks like:
The Ultra96 Board setup looks like:
3. Download and test the design [which we build] yourself
DPU TRD for Ultra96 FPGA [zcu100-revc]. This tutorial have implemented/build the “Resnet50” and “Face_Detection” targeting the Ultra96 FPGA.
Here is the downloadable file of the build, you can download and test it on Ultra96: https://drive.google.com/open?id=1k6Qx85yOmM3zNnACH_V_36utCF0KiOto
Steps for testing on Ultra96 [reference: DPU integration tutorial] ,
- Copy the files from the above link into SD card [8GB or higher size]
- Plug it to your Ultra96, Connect the JTAG-UART [or UART dongle] with ultra96
- Connect the minidp display [monitor]
- Connect the USB webcam [only needed for running the Face_detection application]
- Press the power on Button,
- Connect the Serial terminal at 115200 to the Ultra96 FPGA
- you will get the running steps of ultra96 on serial terminal
- now you can put login : root and password: root on terminal
- enter: export DISPLAY=:0.0 xrandr –output DP-1 –mode 800×600 xset -dpms
- Change to the directory with the resnet50 application and execute the program. • cd /media/card/resnet50 • ./resnet50.elf
11. Change to the following directories with the face_detection application and execute the program.
cd /media/card/face_detection ./face_detection.elf Note: If you see “Open camera error!”, try unplugging the USB camera and inserting it again. If it still isn’t recognized, try rebooting with the camera unplugged, then plug in the camera before launching the application. If both of these efforts fail, try a different camera.
If you get any issues on testing this “demot-test-dpu-trd-ultra96” then write us an email, we will reply you within 24 hour. Mail: firstname.lastname@example.org
Similar build is also available on “desktop-stretch” and “desktop-buster” for demo test provided by https://www.xilinx.com/products/design-tools/ai-inference/ai-developer-hub.html#edge
4. While Building this project… [issues faced]
Our build [step:3] is tested on the Ultra96 FPGA but While building this DPU integration tutorial we get one warning and one error on Petalinux Application [we just dont care on it, build proceeded]:
#ultra86 #DPU #TRD #DPU #Integration #github #DNNDK #Machine #Learning