Reference Tutorial with Harris Corner Detection in Vivado HLS
This tutorial is created by Abhidan Jung Thapa, FPGA Design Engineer, LogicTronix at October ,2018.
In this tutorial we are going to we are going to simulate Harris Corner Detection in Vivado HLS
First clone the github repository of xfOpenCV on your Linux System [CentOS/Ubuntu/other] . For that go to terminal and enter the following command,
git clone https://github.com/Xilinx/xfopencv xfopencv
A local copy of the repo will be saved in you present working directory.
I will contain two folders:
- examples : Examples that evaluate the xfOpenCV kernels, and demonstrate the kernels’ use model
- include : The relevant headers necessary to use the xfOpenCV kernels
Follow these steps to simulate and synthesis of Harris corner detection. We will use example design provided in the repo we cloned above.
- Open the Vivado HLS on you system in GUI mode and then create a new project. Remember to open the Vivado HLS with root privileges. For that enter su in the terminal and type vivado_hls.
Figure 1 Vivado HLS Welcome Page
- Name the project Harris_Corner and click Browse to choose the location to store the project. Then Click Next.
Figure 2 Project Configuration Window
- Then in the Add/Remove Files window we will add our accelerated harris function file. This file named cpp can be found inside xfOpenCV/examples/harris. Click Add Files to locate it. Then click Browse and choose harris_accel as top function. Then Click Next.
Figure 3 Add C source files Window
- Under the test bench section Click Add Files and select xf_harris_tb.cpp file. Then Click Next.
Figure 4 Add Testbench Window
- Leave Solution Name default. Enter Clock Period 10ns and Select Zynq UltraScale+ZCU102 Evaluation Platform in Part Selection.
Figure 5 Solution Configuration and Part Selection
- Click Finish.
- Right click on the project created, Harris_Corner, and select Project Settings.
- Select Simulation in the opened tab.
- Files added under Test Bench section will be displayed. Select xf_harris_tb.cpp and click Edit CFLAGS.
Figure 6 Edit CFLAGS in Simulation Settings
- Enter “ -I<path-to-include-directory> -D__XFCV_HLS_MODE__ -std=c++0x “. Replace <path-to-include-directory> with directory locating xfOpenCV/include in your system.
- Now Select Synthesis Tab and Edit CFLAGS also for cpp.
Figure 7 Edit CFLAGS in Synthesis Settings
- Click OK.
- Run the C Simulation, select Clean Build and specify Input Arguments. In input arguments enter the location to image provided inside xfOpenCV/examples/harris/data
- Then Click OK.
Figure 8 C Simulation Window
- The simulation will run and generate output file.
- All the generated output files/images will be in the solution1->csim->build
For creating IP on HLS using the xfopenCV Function [Porting xfOpenCV into HLS]