AXI-VDMA and AXI Video Processing Resources
- AXI4-Stream Video IP and System Design Guide: https://www.xilinx.com/support/documentation/ip_documentation/axi_videoip/v1_0/ug934_axi_videoIP.pdf
- Resource Utilization for AXI VDMA v6.2: https://www.xilinx.com/support/documentation/ip_documentation/ru/axi-vdma.html
This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters.
- AXI VDMA v6.3 Product Guide: https://www.xilinx.com/support/documentation/ip_documentation/axi_vdma/v6_3/pg020_axi_vdma.pdf
The Xilinx LogiCORE IP AXI VDMA core is a soft IP core. It provides high-bandwidth direct memory access between memory and AXI4-Stream video type target peripherals including peripherals which support the AXI4-Stream Video protocol.
- XAPP1205 Designing High-Performance Video Systems with the Zynq-7000 All Programmable SoC Using IP integrator: https://www.xilinx.com/support/documentation/application_notes/xapp1205-high-performance-video-zynq.pdf
With high-end processing platforms such as the Xilinx Zynq-7000 All Programmable SoC, people want to take full advantage of the processing system and custom peripherals available within the device. an example of this philosophy is a system containing multiple video pipelines in which live video streams are written into memory(input) and memory content is sent out to live video streams(output) while the processor is accessing memory. This application note covers design principles for obtaining high performance from the Zynq-7000 AP SoC memory interfaces, from AXI master interfaces implemented in the programmable logic(PL), and from the ARM Cortex A9 processors.
- XAPP1216 – AXI Chip2Chip Reference Design for Real-Time Video Applications: https://www.xilinx.com/support/documentation/application_notes/xapp1216-axi-chip2chip-aurora.pdf
This application note demonstrates real-time video traffic across two 7 series FPGA evaluation boards. Also demonstrates the capabilities of the AXI Chip2Chip Bridge core using the LogiCORE IP Aurora 64B/66B core as the Physical Layer(PHY).
- XAPP1218 – AXI VDMA Reference Design for the Kintex FPGA KC705 Evaluation Board Application Note: https://www.xilinx.com/support/documentation/application_notes/xapp1218-axi-vdma-for-kc705.pdf
This application note demonstrates how to use the LogiCORE IP AXI Video DMA core in a typical video application. It describes hardware and software APIs. The hardware system uses two VDMAs with both MM2S and S2MM paths shorted. You can refer to this design and use the API in video applications that use VDMA. This application note demonstrates VDMA in loopback mode, but the MM2S and S2MM can also each be connected to separate video IP.
- XAPP521 – Bridging Xilinx Streaming Video interface with the AXI4-Stream Protocol Application Note: https://www.xilinx.com/support/documentation/application_notes/xapp521_XSVI_AXI4.pdf
This application note details bridging an XSVI interface to an AXI4-Stream interface, enabling video designs with Xilinx video IP cores and XSVI interfaces to use the AXI VDMA.
- XAPP740 – Designing High-Performance Video Systems with the AXI Interconnect Application Note: https://www.xilinx.com/support/documentation/application_notes/xapp740_axi_video.pdf
This application note covers the design considerations of a system using the performance features of the LogiCORE IP Advanced eXtensible Interface(AXI) Interconnect core.
- XAPP741 – Designing High-Performance Video Systems in 7 Series FPGAs with the AXI Interconnect Application Note:
This application note covers the design considerations of a video system using the performance features of the LogiCORE IP AXI Interconnect core. The design focuses on high system throughput using approximately 80% of DDR memory bandwidth through the AXI Interconnect core with FMAX and area optimizations in certain portions of the design.
- XAPP742 – AXI VDMA Reference Design: https://www.xilinx.com/support/documentation/application_notes/xapp742-axi-vdma-reference-design.pdf
This application note demonstrates the creation of video systems by using Xilinx native video IP cores such as AXI Video Direct Memory Access(VDMA), Video Timing Controller(VTC), test pattern generator(TPG), and the DDR3 memory controller to process configurable frame rates and resolutions in Kintex-7 FPGAs. The reference design focuses on run time configuration of an onboard clock generator for a video pixel clock and video IP cores for running selected combinations of video resolution and frame rate.