LogicTronix/Digitronix Nepal has design, test and implemented “Accelerated Canny Edge Detection with VIVADO HLS”.
Here is the Real image and Canny edge detected image:
Here is the complete block diagram of the canny algorithm on HLS:
Main Outlines of Canny Algorithm:
- Image has been taken from the FMC/HDMI source, it has been converted into AXI format
- AXI into MATRIX has been done, then RGBtoGRAY has been accomplished
- Sobel Edge calculation, Gradient Decomposition
- Non-Maximum Supression, Hysterisis (Edge Highlighting)
- MATRIX into AXI Data
- AXI -HDMI interconnect by FMC HDMI IP
- Real time Video on HDMI Display of 1080p/720p
Where Step 2-5 has been processed by Accelerated HLS IP and Step 1 and Step 6 are done by FMC HDMI IP (among which some block are available at VIVADO IP integrator)
For more details please write us at: info@logictronix.com or digitronixnepali@gmail.com