Category Archives: News

All information and Event details from Digitronix Nepal. We publish our ongoing projects at this menu.


Collaborate with LogicTronix

We are looking for Business and Sales Partner for US and  European Market. Our main interest of collaboration is on Machine Learning & Computer Vision Systems, Embedded Product Development and FPGA Development for Custom Application as Crypto-Algorithms. If you are interested to collab with us then please write us at:


“3rd National FPGA Design Competition 2018” Concludes

The “3rd National FPGA Design Competition 2018” has been concluded with the grand success today at Kathford Int’l College of Engineering and Management, Balkumari, Lalitpur. The competition was jointly organized by Kathford Int’l College of Engineering and Management, Digitronix Nepal Pvt. Ltd and LogicTronix.

The main objective of the competition is to promote electronic hardware design based on FPGA [An Reconfigurable Chip Technology] in Nepal. This Competition is the continuation of the “Second All Nepal FPGA Design Competition 2017” which was held on July 15, 2017 at Kathford Intl’ College of Engineering and Management and “First FPGA Design Competition 2016” held at July 2. 2016 at IOE Pulchowk Campus.

FPGA, a short form for Field Programmable Gate Array, is a programmable chips technology widely used in hardware systems such as mobile phones, cars to applications in space missions. The FPGA technology is fast becoming one of the market leaders in hardware system design around the world. The world’s top universities such as Harvard, MIT and Stanford have a very large scale research group doing their research based on FPGA.  The competition hopes to lay a foundation of FPGA research in Nepal by enhancing the FPGA application development skills and encouraging engineering students to do their projects on FPGA.

In the competition the total participant teams are 10, the winner of this contest is Arjun Neupane from Nepal Engineering College with project – “16-bit Microprocessor Design, Simulation and Implementation”, was awarded a cash prize of NRs. 15,000. The first runner-up, Ms. Shweta Chaudhary, Kala Raut and Ichchha Rauniyar from Khwopa Engineering Campus with the project traffic light design and prototype for Baneshowr Chowk, and the second runner-up, Mr. Subash Pandey from IOE Thapathali Campus with the project Vehicle Number Plate Recognition, received Rs. 7,000 and Rs. 4000 respectively. The award winners will also get an opportunity to receive training on Xilinx Zynq FPGA development board and Internship on FPGA research and development at Digitronix Nepal. The competition also get request from the international participant’s from Indian Institute of Technology (IIT)-India & some university students from USA, in the upcoming competition organizer will also include those international request for the participation on FPGA Design Competition.

An advisor of this event Mr. Deepesh Man Shakya, a Xilinx FPGA Engineer said this 3rd edition of FPGA Design Competition is a major milestone in introducing and enhancing FPGA education in Nepal and provide a platform for creating FPGA based research and development centers. Mr. Shakya said such initiatives could potentially turn into a design house providing hi-tech engineering jobs to many aspiring engineers within the country.

Dr. Madhusudan Kayastha , Principal of Kathford International College of Engineering and Management suggested to participant for preparing research papers and articles which will help then for further courier. The co-ordinator of this competition Mr. Krishna Gaihre from Digitronix Nepal & LogicTronix said that there has been a huge interest from engineering colleges and students towards FPGA Research and Development. Digitronix Nepal is currently focused on training, research and development of hardware designs based on FPGA. Digitronix Nepal also believes that within few years it will be create 10s of opportunities for Nepalese Engineering Graduates on the field of FPGA Design & VLSI Design.

The chief guest at the event Prof. Dr. Dinesh Kumar Sharma from IOE Pulchowk Campus lauded the event organizers and supporters for the effort they have put and also expressed his support in adopting FPGA in the mainstream engineering courses and help develop FPGA research environment in engineering colleges in Nepal.


Internship on FPGA based Machine Learning and Neural Net Implementation

Digitronix Nepal have Some Places on AI (Machine Learning, Neural Nets) based Research & Development in FPGA. Interested enthusiast can contact us at : or +977-9841078525.


Digitronix Nepal will welcome application on ML and NN and what we require is we like to engage interns on Machine Learning and Neural Nets based on FPGA Research and Development.There will be the selection process for internship.

So for the application here is Prerequisite knowledge and skills :
  1.  VHDL/Verilog and C/C++ (Basic/Moderate),
  2. Idea of FPGA (algorithm implementation on Zynq based FPGA: Zybo FPGA).
  3. AI (Neural Net and Machine Learning).
Please review also the following link (copied of google search): Neural Net implementation on FPGA
Machine Learning Implementation on FPGA
Some FAQ’s: how long this project will run and what is the procedure for selection and what number of people can attend this program.
Answers: this project will run for three month initially (and more depends on the objective/goal) based on more than 10 credit/week, selection procedure is based on the knowledge/skill on VHDL/Verilog,FPGA and AI, there will be one team (upto five members) working on this stream.